Structural Decision Diagrams in Digital Test / Computer Science Foundations and Applied Logic (PDF)

the Centre for Dependable Computing Systems of Tallinn University of Technology (TalTech), Estonia. Prof. Raik received his M.Sc. and Ph.D. degrees at TalTech in 1997 and in 2001, respectively. He has co-authored more than 200 peer-reviewed scientific publications. His research interests cover a wide area in electrical engineering and computer science domains, including hardware test, functional verification, fault-tolerance and security as well as emerging computer architectures. He is a member of IEEE Computer Society, HiPEAC and a member of steering/program committees of several leading conferences in his fields. He acted as the General Co-Chair of IEEE European Test Symposium 2020, the General Chair of the IFIP/IEEE VLSI-SoC'16 and IEEE DDECS'12 Conferences and the Program Co-Chair of IEEE DDECS'23, CDN-Live'16 and the Program Chair of IEEE DDECS'15. He was the main coordinator for several Europe-wide research and collaboration actions. 16 PhD Theses have been successfullydefended under his supervision.

Prof. Maksim Jenihhin is a tenured associate professor of Computing Systems Reliability at the Department of Computer Systems of Tallinn University of Technology and the head of the research group "Trustworthy and Efficient Computing Hardware". He received his Ph.D. degree in Computer Engineering from the same university in 2008. His research interests include methodologies and EDA tools for hardware design, verification and debugging as well as nanoelectronics reliability and manufacturing test topics. He supervised 5 PhD theses on these topics and published more than 170 peer-reviewed publications. He is a coordinator for national and European research projects, including H2020 MSCA ITN "RESCUE - Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems Design", PRG 2022 "CRASHLESS- Cross-Layer Reliability and Self-Health Awareness for Intelligent Autonomous Systems". Prof. Jenihhin is a member of executive and program committees for IEEE ETS, DATE, DDECS, and a number of other international events and served as a guest editor for special issues of journals.

Dr. Artur Jutman has been managing industrial and research projects in Testonica Lab Ltd. for over 15 years now. His professional focus embraces such topics as diagnostic and defect modeling, test optimization, embedded test instrumentation, test firmware, BIST, DFT as well as both ASIC and system test in a broad sense - all yielding over 160 peer-reviewed research papers published. Dr. Jutman has co-ordinated several EU-funded research projects on test-related topics, participated in organizing test conferences and workshops across Europe as well as given several keynotes, invited talks, embedded and full tutorials at international conferences and symposia. Being deeply inspired by test technologies, Artur has given numerous hands-on training sessions and lecture courses in testing, diagnostics, and DFT for industrial engineers and graduate students in several countries, incl. Germany, Italy, Sweden, Portugal, Russia, and Estonia. Before starting his industrial career, Dr. Jutman spent cumulatively several years being a visiting researcher in several universities across Europe, incl. TU Darmstadt, TU Ilmenau, TU Warsaw, TU Jonkoping, Politecnico di Torino, University of Aveiro, and University of Linkoping. He is also a member of the executive committee of the Nordic Test Forum (NTF) society. Dr. Artur Jutman received his M.Sc. and Ph.D. degrees in computer engineering from Tallinn University of Technology, Estonia in 1999 and 2004 respectively.