Design and Testing of Reversible Logic / Lecture Notes in Electrical Engineering Bd.577 (PDF)

and its Applications. Also he has shared his experience as a Guest Editor for Pertanika Journal of Science and Technology, Chairman of CUTSE International Conference 2011, Conference Chair of series of International Conference on Smart Computing and Communication (ICSCC), and as editorial board member of UNITAR e-journal. He is involved in reviewing process in different journals and conferences of repute including IEEE transaction of computer, IET, IEEE conference on ITC, ADCOM, etc.
Masahiro Fujita received his Ph.D. in Information Engineering from the University of Tokyo in 1985 on his work on model checking of hardware designs by using logic programming languages. In 1985, he joined Fujitsu as a researcher and started to work on hardware automatic synthesis as well as formal verification methods and tools, including enhancements of BDD/SAT based techniques. From 1993 to 2000, he was director at Fujitsu Laboratories of America and headed a hardware formal verification group developing a formal verifier for real-life designs having more than several million gates. The developed tool has been used in production internally at Fujitsu and externally as well. Since March 2000, he has been a professor at VLSI Design and Education Center of the University of Tokyo. He has done innovative work in the areas of hardware verification, synthesis, testing, and software verification-mostly targeting embedded software and web-based programs. He has been involved in a Japanese governmental research project for dependable system designs and has developed a formal verifier for C programs that could be used for both hardware and embedded software designs. The tool is now under evaluation jointly with industry under governmental support. He has authored and co-authored 10 books, and has more than 200 publications. He has been involved as program and steering committee member in many prestigious conferences on CAD, VLSI designs, software engineering, and more. His current research interests include synthesis and verification in SoC (System on Chip), hardware/software co-designs targeting embedded systems, digital/analog co-designs, and formal analysis, verification, and synthesis of web-based programs and embedded programs.
Anand Mohan, former Director of National Institute of Technology (NIT), Kurukshetra, Haryana has 41 years of rich experience in teaching, research, industrial R & D. He is currently working as Professor (HAG) in the Department of Electronics Engineering, IIT(BHU), Varanasi. He has made notable research contributions in the areas of robust watermarking, telemedicine, and fault tolerant digital system design. Eleven students have been awarded Ph.D. degree under his supervision. Prof. Mohan has successfully completed eight sponsored projects funded by MHRD, AICTE and Ministry of Communication & Information Technology, Govt. of India, New Delhi. He has published 145 research papers in reputed international/national journals and conference proceedings. Prof. Mohan has provided national level leadership to the defence-related R & D activities as Chairman of Armament Sensors & Electronics (ASE) Panel under ARMREB, DRDO, Ministry of Defence, Govt. of India. He has been associated with several important academic and research advisory committees as Chairman of Ad-hoc committees of Software Technology Parks of India (STPI), DRDO laboratories, NAAC, and AICTE and Member of DST, UGC, and CSIR committees. He obtained UG, PG and Ph.D. degrees in Electronics Engineering from Banaras Hindu University. He is recipient of 'Life Time Achievement Award' conferred by Kamla Nehru Institute of Technology (KNIT), Sultanpur (2016). He is Fellow of Institution of Electronics and Telecommunication Engineers (IETE), Fellow of Institution of Engineers (I), Member, IEEE, USA life member of Project Management Associates (PMA), New Delhi, and Life member of Indian Society of Technical Education (ISTE), New Delhi.