Analog Layout Synthesis (PDF)

Analog Layout Synthesis: A Survey of Topological Approaches
Edited by:

Helmut E. Graeb


Analog components appear on 75% of all chips, and cause 40% of the design effort and 50% of the re-designs. Due to increasing functional complexity of systems-on-chip, the difficulties in analog design and the lack of design automation support for analog circuits make analog components a bottleneck in chip design. Design methodology and design automation for analog circuits therefore is a crucial problem for developing systems-on-chip and layout synthesis is a key part of the analog design flow.

Layout design is the step of the analog design flow with the least support by commercially available, computer-aided design tools. This book provides a survey of promising new approaches to automated, analog layout design, which have been described recently and are rapidly being adopted in industry.

.Presents a comprehensive survey of promising new methods for automated, analog layout design;
.Covers a variety recent of approaches to topological placement of analog circuits;
.Provides a comprehensive overview of routing issues and techniques for analog circuits;
.Provides a complete view of analog layout in the design flow, including retargeting an existing layout for a new technology, integrating layout in the sizing process, and constraint management;
.Represents a one-of-a-kind, single-source reference to the latest advances in analog layout synthesis.