Verification Plans
The Five-Day Verification Strategy for Modern Hardware Verification Languages
(Sprache: Englisch)
Verification isjob one in today's modem design process. Statistics tell us that the verification process takes up a majority of the overall work. Chips that come back dead on arrival scream that verification is at fault for not finding the mistakes. How do...
Leider schon ausverkauft
versandkostenfrei
Buch
Fr. 240.90
inkl. MwSt.
- Kreditkarte, Paypal, Rechnungskauf
- 30 Tage Widerrufsrecht
Produktdetails
Produktinformationen zu „Verification Plans “
Klappentext zu „Verification Plans “
Verification isjob one in today's modem design process. Statistics tell us that the verification process takes up a majority of the overall work. Chips that come back dead on arrival scream that verification is at fault for not finding the mistakes. How do we ensure success? After an accomplishment, have you ever had someone ask you, "Are you good or are you just lucky?"? Many design projects depend on blind luck in hopes that the chip will work. Other's, just adamantly rely on their own abilities to bring the chip to success. ill either case, how can we tell the difference between being good or lucky? There must be a better way not to fail. Failure. No one likes to fail. ill his book, "The Logic of Failure", Dietrich Domer argues that failure does not just happen. A series of wayward steps leads to disaster. Often these wayward steps are not really logical, decisive steps, but more like default omissions. Anti-planning if you will, an ad-hoc approach to doing something. To not plan then, is to fail.
Inhaltsverzeichnis zu „Verification Plans “
1 Plan, Plan, Plan.- Verification.- General Specifications.- Transposition.- Verification Systems.- Why Have A Plan.- Same Page, Same Direction.- Overall Approach.- Logistics.- Divide and Conquer.- Effort Assessment.- Battle Choice.- The Plan.- 2 Shotgun Verification.- HDL vs HVL.- Schematics to Hdl.- HDL to HVL.- HVL Plan.- HVL Gone Bad.- HVL Benefits.- The New Midset: Shotguns and Peashooters.- Three Enabling Verification Methodologies.- Generation: Flow.- Checking.- Coverage.- Coverage Percentage.- Bottomline.- 3 Getting Started.- Preliminaries: Greasing the Skids.- Preliminaries: The Bigwigs.- Preliminaries: Information Input.- Preliminaries: The Game Plan.- Preliminaries: Be Smart, Be Sneaky.- The When.- The When: Meetings.- The Who: Verification Team.- The Who: Others.- The Who: Reality Check.- Day One: Brain Dump, Brain Fill.- Day One: The Past.- Day One: The Future.- Day One: The Overall Approach.- Day One: To Do List, Stuff to Talk About, Questions to Ask.- Day One: Extras.- Day One: Gotchas.- Day One: Assignments.- Final Thought.- 4 Day in the Life.- DITL.- Resistance.- Verification and DITL.- How To: People.- How To: Audience.- How To: Y Tree or Flow Chart.- How To: Data.- How To: Format.- Day Two: Getting started.- Day Two: DITL.- Day Two: Verification System Architect.- Day Two: Generation.- Day Two: To Do List, stuff to talk about, questions to ask.- Day Two: Extras.- Day Two: Gotchas.- Day Two: Assignments.- Final Thought.- Chapters 5 Layers and Phases.- Introduction:.- Verification Components.- Existing Code.- Layers and Phases: An Introduction.- Day Three: Getting Started.- Day Three: Layers.- Day Three: Phases.- Day Three: Integrating Layers and Phases.- Day Three: Results.- Day Three: To Do List, stuff to talk about, questions to ask.- Day Three: Extras.- Day Three: Gotchas.- Day Three: Assignments.- Final Thought.- 6 Format.- Audience.- Goal, Purpose, And Flow.- Size and Breakout Documents.- Entry Tools.- Entry Tool: Text Editor.- Entry Tool:
... mehr
Microsoft Word.- Entry Tool: Microsoft Excel.- Entry Tool: Framemaker.- Other Word Processors.- Entry Tool: HTML.- Charts and Graphs.- Bubble Diagrams.- Flowcharts.- Y Diagrams.- Tables.- UML Diagrams.- Which Do I Choose?.- Final Thoughts.- Chapter7 Information Extraction.- Philosophy.- The Nature of Prediction.- Talking Heads and Silent Types.- Structure in Chaos.- Reverse osmosis.- Paradoxical Solutions.- Gut vs fuzzy.- Spiral convergence.- Yellow-Sticky Method.- YSM Procedure.- YSM: Is something burning?.- YSM Gotchas.- YSM Assignment.- Final Thoughts.- 8 Breakout Documents.- Day Four, Day Five, And Beyond.- System Admin Breakout Document Content.- Directory Structure.- File Naming Conventions.- Code Templates/Guidelines.- Revision Control System.- Bug Tracker.- Scripts.- Web Pages and Groups.- Verification Support or Side Tools.- Simulator Interfaces.- Compute Farms and Licenses.- Base Code.- System Admin Breakout Document Summary.- Checkers Breakout Document Content.- Checkers Breakout Document Summary.- Scoreboards Breakout Document Content.- Scoreboards Breakout Document Summary.- Functional coverage breakout document content.- Functional Coverage Breakout Document Summary.- SEQ and Scenarios Breakout Document Content.- SEQ and Scenarios Breakout Document Summary.- Schedule Breakout Document Content.- Schedule Plan Breakout Document Summary.- Other Documents.- Final Thoughts.- 9 Wrap Up.- What about the Features?.- When to use directed?.- Are there other 5-Day Paths that Yield Success?.- Where do I get a Soft Copy?.- Was this Book Plug to get Consulting Gigs?.- Is it Ok to use other Formats?.- Why do you spell your Name Wrong?.- Contact Information.- Appendix Intro.- Appendix A Day in the Life Document Examples.- A1: Usbnode.- A2: Coolswitch.- Appendix B Main Plan Document Usbnode Example.- Appendix C Breakout Document Examples.- C1: System administration.- C2: CHECKER Document.- C3: scoreboard Document.- C4: Coverage Document.- C5: Scenario and Sequence Document.- C6: Schedule spreadsheet example.- Appendix D Original Five Day Paper.
... weniger
Bibliographische Angaben
- Autor: Peet James
- 2003, 2004., 229 Seiten, Masse: 16 x 24,1 cm, Gebunden, Englisch
- Verlag: Springer Netherlands
- ISBN-10: 1402076193
- ISBN-13: 9781402076190
- Erscheinungsdatum: 31.10.2003
Sprache:
Englisch
Rezension zu „Verification Plans “
"In this book, Peet gives every engineer trying to do functional verification a jump-start on getting it under control...His technique...is soundly grounded in the real world, honed through years of experience and practice. If you adopt this approach, it will improve the speed with which verification plans are produced, improve their quality, help eliminate redundant work, and reduce unnecessary work...But wait, there's more. Peet not only tells you how to do it, he tells you why you should do it a certain way, and why Hardware Verification Languages give you an advantage (motivation for you to check out the new techniques and ammunition for your presentations to management)...I have been helped already by what Peet gives in his book. I'm keeping my copy right next to Janick's book." (Glenn Hunt, Texas Instruments)
Kommentar zu "Verification Plans"
0 Gebrauchte Artikel zu „Verification Plans“
| Zustand | Preis | Porto | Zahlung | Verkäufer | Rating |
|---|
Schreiben Sie einen Kommentar zu "Verification Plans".
Kommentar verfassen