Proceedings of the Third International Conference on Microelectronics, Computing and Communication Systems

A Novel Approach for Pain Intensity Detection by Kaze Features.- Performance Analysis of Triband Elliptical Patch Microstrip Antenna for Gps and Radar Application.- Multi-Attached Network Topology with Different Routing Protocols and Stub Network Resolution in Ospf Routing.- Design and Analysis of 1t Dram Architectures Using Ambipolar Misfets.-Evolutionary Decision Tree Based Intrusion Detection System.- A Brief Survey on Exploratory Search Systems.- A New Neighborhood Based Outlier Detection Technique.- An Assessment of Advanced Transportation Research Opportunities.- Study and Design of Obstacle Detection Mechanism.

Dr. Vijay Nath was born in Gorakhpur (U.P.) India in 1976. He received his Bachelor degree in Physics and Master degree in Electronics from DDU Gorakhpur University, India in 1998 and 2001. He also received PGDCN (GM) from MMMUT Gorakhpur in 1999. He received his Ph.D. degree in VLSI Design & Technology from Dr. RML Avadh University Faizabad in association with CEERI-Pilani in 2008. From 2000 to 2001 he served as project trainee in IC Design Group CEERI Pilani under the guidance of Dr. K.S.Yadav (Senior Scientist). From 2002 to 2006 he severed as faculty in the Department of Electronics, DDU University Gorakhpur. In 2006, he joined as a faculty in the Department of Electronics and Communication Engineering, Birla Institute of Technology Mesra Ranchi (JH) India. Presently he is Professor In-charge of Embedded System Design Lab, Advisor of NAPS (News & Publication Society), Member of BIT Mesra Brand Management, Faculty Advisor IEI Student Chapter (ECE) BIT Mesra and Honorary Secretaryof IETE Ranchi Centre. He is the recipient of Viveka Nanda Techno Fiesta Award-2002, Young Scientist Award-2004, CCSN Best Paper Award-2013, First Prize in IEI Technical Contest-2013, and Cadence Design Contest-2014, 2016. His research interests include microelectronics, nanoelectronics, analog, digital, mixed CMOS VLSI circuits, low power VLSI circuits, ultra low power CMOS temperature sensor, ADC, DAC, PTAT, CMOS bandgap voltage reference, ASICs, Embedded Systems Designs, Smart Cardiac Pacemaker, Smart Grids, Internet of Things, and early stage cancer detection. He has to his credit around 150 publications in reputed Scopus & SCI journals, Scopus books and conferences. He has successfully completed two R&D projects funded by DST New Delhi jointly with DRDL Hyderabad and MHRD New Delhi, and the third project is in ongoing stage funded by RESPOND SAC ISRO Ahmadabad, Government of India. He has developed VLSI Design course under Developing Suitable Pedagogical Methods for