Electromigration Modeling at Circuit Layout Level
(Sprache: Englisch)
Integrated circuit (IC) reliability is of increasing concern in present-day IC technology where the interconnect failures significantly increases the failure rate for ICs with decreasing interconnect dimension and increasing number of interconnect levels....
Voraussichtlich lieferbar in 3 Tag(en)
versandkostenfrei
Buch (Kartoniert)
Fr. 59.00
inkl. MwSt.
- Kreditkarte, Paypal, Rechnungskauf
- 30 Tage Widerrufsrecht
Produktdetails
Produktinformationen zu „Electromigration Modeling at Circuit Layout Level “
Klappentext zu „Electromigration Modeling at Circuit Layout Level “
Integrated circuit (IC) reliability is of increasing concern in present-day IC technology where the interconnect failures significantly increases the failure rate for ICs with decreasing interconnect dimension and increasing number of interconnect levels. Electromigration (EM) of interconnects has now become the dominant failure mechanism that determines the circuit reliability. This brief addresses the readers to the necessity of 3D real circuit modelling in order to evaluate the EM of interconnect system in ICs, and how they can create such models for their own applications. A 3-dimensional (3D) electro-thermo-structural model as opposed to the conventional current density based 2-dimensional (2D) models is presented at circuit-layout level.
Inhaltsverzeichnis zu „Electromigration Modeling at Circuit Layout Level “
CHAPTER 1 Introduction1.1 Overview of Electromigration
1.2 Modeling of Electromigration
1.3 Organization of the Book
1.4 Summary
CHAPTER 2 3D Circuit Model Construction and Simulation
2.1 Introduction
2.2 Layout Extraction and 3D Model Construction
2.3 Transient Electro-thermo-structural Simulations and Atomic Flux Divergence (AFD) Computation
2.4 Simulation Results and Discussions
2.5 Effects of Barrier Thickness and Low-¿ Dielectric on Circuit EM Reliability
2.6 Summary
CHAPTER 3 Comparison of EM Performances in Circuit and Test Structures
3.1 Introduction
3.2 Model Construction and Simulation Setup
3.3 Distributions of Atomic Flux Divergences under Different Operation Conditions
3.4 Effects of Interconnect Structures on Circuit EM Reliability
3.5 Effects of Transistor Finger Number on Circuit EM Reliability
3.6 Summary
CHAPTER 4 Interconnect EM Reliability Modeling at Circuit Layout Level
4.1 Introduction
4.2 Model
... mehr
Construction and Simulation Setup
4.3 Distributions of Atomic Flux Divergences
4.4 Effects of Layout and Process parameters on Circuit EM Reliability. 4.5 Summary
CHAPTER 5 Concluding Remarks
5.1 Conclusions
5.2 Recommenations for Future Work
4.3 Distributions of Atomic Flux Divergences
4.4 Effects of Layout and Process parameters on Circuit EM Reliability. 4.5 Summary
CHAPTER 5 Concluding Remarks
5.1 Conclusions
5.2 Recommenations for Future Work
... weniger
Bibliographische Angaben
- Autoren: Cher Ming Tan , Feifei He
- 2013, IX, 103 Seiten, 2 farbige Abbildungen, Masse: 15,5 x 23,5 cm, Kartoniert (TB), Englisch
- Verlag: Springer, Berlin
- ISBN-10: 9814451207
- ISBN-13: 9789814451208
- Erscheinungsdatum: 04.05.2013
Sprache:
Englisch
Kommentar zu "Electromigration Modeling at Circuit Layout Level"
0 Gebrauchte Artikel zu „Electromigration Modeling at Circuit Layout Level“
Zustand | Preis | Porto | Zahlung | Verkäufer | Rating |
---|
Schreiben Sie einen Kommentar zu "Electromigration Modeling at Circuit Layout Level".
Kommentar verfassen