Network Processor Design (PDF)
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Responding to ever-escalating requirements for performance, flexibility, and economy, the networking industry has opted to build products around network processors. To help meet the formidable challenges of this emerging field, the editors of this volume created the first Workshop on Network Processors, a forum for scientists and engineers to discuss latest research in the architecture, design, programming, and use of these devices. This series of volumes contains not only the results of the annual workshops but also specially commissioned material that highlights industry's latest network processors.
Like its predecessor volume, Network Processor Design: Principles and Practices, Volume 2 defines and advances the field of network processor design. Volume 2 contains 20 chapters written by the field's leading academic and industrial researchers, with topics ranging from architectures to programming models, from security to quality of service.
- Describes current research at UNC Chapel Hill, University of Massachusetts, George Mason University, UC Berkeley, UCLA, Washington University in St. Louis, Linköpings Universitet, IBM, Kayamba Inc., Network Associates, and University of Washington.
- Reports the latest applications of the technology at Intel, IBM, Agere, Motorola, AMCC, IDT, Teja, and Network Processing Forum.
Patrick Crowley is an associate Professor in the Department of Computer Science & Engineering at Washington University in St. Louis, Missouri. His research interests are in computer and network systems architecture, with a current focus on the design of programmable embedded network systems and the invention of superior network monitoring and security techniques. He co-founded the ACM/IEEE Symposium on Architectures for Networking and Communications Systems, and co-edited the three-book series, Network Processor Design. He serves as Associate Editor of the IEEE/ACM Transactions on Networking. In 2007, Crowley was chosen to join the DARPA Computer Science Study Group.
Haldun Hadimioglu received his BS and MS degrees in Electrical Engineering at Middle East Technical University, Ankara Turkey and his Ph.D. in Computer Science from Polytechnic University in New York. He is
Peter Z. Onufryk received his B.S.E.E. from Rutgers University, M.S.E.E. from Purdue University, and Ph.D. in Electrical and Computer Engineering from Rutgers University. He is currently a director in the Internetworking Products Division at Integrated Device Technology, Inc. where he is responsible for architecture definition and validation of communications products. Before joining IDT, Peter was a researcher for thirteen years at AT&T Labs - Research (formally AT&T Bell Labs) where he worked on communications systems and parallel computer architectures. These included a number of parallel, cache-coherent multiprocessor and dataflow based machines that were targeted towards high performance military systems. Other work there focused on packet telephony and early network processors. Onufryk is a member of the IEEE. He was an organizer and program committee member of the HPCA8 Workshop on Network Processors 2002. Peter was the architect of four communications processors as well as numerous ASICs, boards, and systems.
- 2003, 464 Seiten, Englisch
- Herausgegeben: Mark A. Franklin, Patrick Crowley, Haldun Hadimioglu, Peter Z. Onufryk
- Verlag: Elsevier Science & Techn.
- ISBN-10: 0080491944
- ISBN-13: 9780080491943
- Erscheinungsdatum: 02.12.2003
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- Grösse: 2.69 MB
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