Boolean Circuit Rewiring (ePub)
Bridging Logical and Physical Designs
(Sprache: Englisch)
Demonstrates techniques which will allow rewiring rates of
over 95%, enabling adoption of deep sub-micron chips for industrial
applications
Logic synthesis is an essential part of the modern digital IC
design process in semi-conductor industry. This...
over 95%, enabling adoption of deep sub-micron chips for industrial
applications
Logic synthesis is an essential part of the modern digital IC
design process in semi-conductor industry. This...
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Demonstrates techniques which will allow rewiring rates of
over 95%, enabling adoption of deep sub-micron chips for industrial
applications
Logic synthesis is an essential part of the modern digital IC
design process in semi-conductor industry. This book discusses a
logic synthesis technique called "rewiring" and its
latest technical advancement in term of rewirability. Rewiring
technique has surfaced in academic research since 1993 and there is
currently no book available on the market which systematically and
comprehensively discusses this rewiring technology. The authors
cover logic transformation techniques with concentration on
rewiring. For many decades, the effect of wiring on logic
structures has been ignored due to an ideal view of wires and their
negligible role in the circuit performance. However in
today's semiconductor technology wiring is the major player
in circuit performance degeneration and logic synthesis engines can
be improved to deal with this through wire-based transformations.
This book introduces the automatic test pattern generation
(ATPG)-based rewiring techniques, which are recently active in the
realm of logic synthesis/verification of VLSI/SOC designs.
* Unique comprehensive coverage of semiconductor rewiring
techniques written by leading researchers in the field
* Provides complete coverage of rewiring from an introductory to
intermediate level
* Rewiring is explained as a flexible technique for Boolean logic
synthesis, introducing the concept of Boolean circuit
transformation and testing, with examples
* Readers can directly apply the described techniques to
real-world VLSI design issues
* Focuses on the automatic test pattern generation (ATPG) based
rewiring methods although some non-ATPG based rewiring methods such
as graph based alternative wiring (GBAW), and "set of pairs
of functions to be distinguished" (SPFD) based rewiring are
also discussed
A valuable resource for researchers and postgraduate students in
VLSI and SoC design, as well as digital design engineers, EDA
software developers, and design automation experts that specialize
in the synthesis and optimization of logical circuits.
over 95%, enabling adoption of deep sub-micron chips for industrial
applications
Logic synthesis is an essential part of the modern digital IC
design process in semi-conductor industry. This book discusses a
logic synthesis technique called "rewiring" and its
latest technical advancement in term of rewirability. Rewiring
technique has surfaced in academic research since 1993 and there is
currently no book available on the market which systematically and
comprehensively discusses this rewiring technology. The authors
cover logic transformation techniques with concentration on
rewiring. For many decades, the effect of wiring on logic
structures has been ignored due to an ideal view of wires and their
negligible role in the circuit performance. However in
today's semiconductor technology wiring is the major player
in circuit performance degeneration and logic synthesis engines can
be improved to deal with this through wire-based transformations.
This book introduces the automatic test pattern generation
(ATPG)-based rewiring techniques, which are recently active in the
realm of logic synthesis/verification of VLSI/SOC designs.
* Unique comprehensive coverage of semiconductor rewiring
techniques written by leading researchers in the field
* Provides complete coverage of rewiring from an introductory to
intermediate level
* Rewiring is explained as a flexible technique for Boolean logic
synthesis, introducing the concept of Boolean circuit
transformation and testing, with examples
* Readers can directly apply the described techniques to
real-world VLSI design issues
* Focuses on the automatic test pattern generation (ATPG) based
rewiring methods although some non-ATPG based rewiring methods such
as graph based alternative wiring (GBAW), and "set of pairs
of functions to be distinguished" (SPFD) based rewiring are
also discussed
A valuable resource for researchers and postgraduate students in
VLSI and SoC design, as well as digital design engineers, EDA
software developers, and design automation experts that specialize
in the synthesis and optimization of logical circuits.
Autoren-Porträt von Tak-Kei Lam, Wai-Chung Tang, Xing Wei, Yi Diao, David Yu-Liang Wu
Tak-Kei Lam, The Chinese University of Hong Kong, Hong Kong.Wai-Chung Tang, Queen Mary University of London, UK.
Xing Wei, Easy-Logic Technology Ltd. Hong Kong.
Yi Diao, Easy-Logic Technology Ltd. Hong Kong.
David Yu-Liang Wu, Easy-Logic Technology Ltd. Hong Kong.
Bibliographische Angaben
- Autoren: Tak-Kei Lam , Wai-Chung Tang , Xing Wei , Yi Diao , David Yu-Liang Wu
- 2016, 1. Auflage, 232 Seiten, Englisch
- Verlag: John Wiley & Sons
- ISBN-10: 1118750144
- ISBN-13: 9781118750148
- Erscheinungsdatum: 11.01.2016
Abhängig von Bildschirmgrösse und eingestellter Schriftgrösse kann die Seitenzahl auf Ihrem Lesegerät variieren.
eBook Informationen
- Dateiformat: ePub
- Grösse: 24 MB
- Mit Kopierschutz
Sprache:
Englisch
Kopierschutz
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