VLSI Design for Video Coding
H.264/AVC Encoding from Standard Specification to Chip
(Sprache: Englisch)
High definition video requires substantial compression in order to be transmitted or stored economically. This volume presents VLSI design and chip implementation for high definition H.264/AVC video encoding using a state-of-the-art video application.
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Produktinformationen zu „VLSI Design for Video Coding “
High definition video requires substantial compression in order to be transmitted or stored economically. This volume presents VLSI design and chip implementation for high definition H.264/AVC video encoding using a state-of-the-art video application.
Klappentext zu „VLSI Design for Video Coding “
High definition video requires substantial compression in order to be transmitted or stored economically. Advances in video coding standards from MPEG-1, MPEG-2, MPEG-4 to H.264/AVC have provided ever increasing coding efficiency, at the expense of great computational complexity which can only be delivered through massively parallel processing.This book will present VLSI architectural design and chip implementation for high definition H.264/AVC video encoding, using a state-of-the-art video application, with complete VLSI prototype, via FPGA/ASIC. It will serve as an invaluable reference for anyone interested in VLSI design and high-level (EDA) synthesis for video.
Inhaltsverzeichnis zu „VLSI Design for Video Coding “
to Video Coding and H.264/AVC.- Intra Prediction.- Integer Motion Estimation.- Fractional Motion Estimation.- Motion Compensation.- Transform Coding.- Deblocking Filter.- CABAC Encoder.- System Integration.
Bibliographische Angaben
- Autoren: Youn-Long Steve Lin , Chao-Yang Kao , Hung-Chih Kuo , Jian-Wen Chen
- 2014, 2010, XI, 176 Seiten, Masse: 15,5 x 23,5 cm, Kartoniert (TB), Englisch
- Verlag: Springer, Berlin
- ISBN-10: 1489983821
- ISBN-13: 9781489983824
Sprache:
Englisch
Rezension zu „VLSI Design for Video Coding “
From the reviews:"An academic project of developing an application-specific VLSI architecture for H.264/AVC video encoding is described in the book. ... The book addresses to researchers, educators, and developers in video coding systems, hardware accelerators for image/video processing, and high-level synthesis of VLSI. Especially, those who are interested in state-of-the-art parallel architecture and implementation of intra prediction, integer motion estimation, fractional motion estimation, discrete cosine transform, context-adaptive binary arithmetic coding, and deblocking filter will find design ideas from this book." (Eleonor Ciurea, Zentralblatt MATH, Vol. 1191, 2010)
Pressezitat
From the reviews:"An academic project of developing an application-specific VLSI architecture for H.264/AVC video encoding is described in the book. ... The book addresses to researchers, educators, and developers in video coding systems, hardware accelerators for image/video processing, and high-level synthesis of VLSI. Especially, those who are interested in state-of-the-art parallel architecture and implementation of intra prediction, integer motion estimation, fractional motion estimation, discrete cosine transform, context-adaptive binary arithmetic coding, and deblocking filter will find design ideas from this book." (Eleonor Ciurea, Zentralblatt MATH, Vol. 1191, 2010)
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