Low-Power Variation-Tolerant Design in Nanometer Silicon
(Sprache: Englisch)
Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. This book focuses on circuit/architectural design techniques for achieving low power operation under parameter variations.
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Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. This book focuses on circuit/architectural design techniques for achieving low power operation under parameter variations.
Inhaltsverzeichnis zu „Low-Power Variation-Tolerant Design in Nanometer Silicon “
- Introduction and Motivation- Background on Power Dissipation
- Background on Parameter Variations
- Low power Logic Design under Variations
- Low Power Memory Design under Variations
- System and Architecture Level Design
- Emerging Challenges and Solution Approach
- Conclusion and Discussion
Bibliographische Angaben
- 2014, 2011, XV, 440 Seiten, Masse: 15,5 x 23,5 cm, Kartoniert (TB), Englisch
- Herausgegeben: Swarup Bhunia, Saibal Mukhopadhyay
- Verlag: Springer, Berlin
- ISBN-10: 1489981578
- ISBN-13: 9781489981578
Sprache:
Englisch
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