Figueiredo, P: OFFSET REDUCTION TECHNIQUES IN
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Offset Reduction Techniques in High-Speed Analog-to-Digital Converters analyzes, describes the design, and presents test results of Analog-to-Digital Converters (ADCs) employing the three main high-speed architectures: flash, two-step flash and folding and interpolation. The advantages and limitations of each one are reviewed, and the techniques employed to improve their performance are discussed.
Preface. List of Symbols and Abbreviations.
Pedro Figueiredo received the degrees of Licenciado and Doutor (PhD) in Electrical and Computer Engineering in 1999 and 2006, respectively, from the Instituto Superior Técnico (IST), Lisbon, Portugal. From 1997 to 1999, he was with the Analog and Mixed-Mode Circuits Group in the Institute for Systems and Computer Engineering (INESC), Lisbon, Portugal, where he worked on low-noise logic families and high-speed Analog-to-Digital Converters.In 1999, he joined Chipidea - Microelectrónica, where he currently leads the group responsible for the design of Analog-to-Digital Converters. His main research interests are in the area of analog and mixed-signal circuits, with emphasis on high-speed data conversion and design automation. He has 10 publications in international journals and conferences.
- Autoren: Pedro M. Figueiredo , João C. Vital
- XX, 382 Seiten, Masse: 16,4 x 24,4 cm, Gebunden, Englisch
- Verlag: Springer Netherland
- ISBN-10: 1402097158
- ISBN-13: 9781402097157
- Erscheinungsdatum: 09.03.2009
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